Real-Time Multi-Node Hardware-in-the-Loop Architecture for 6G ISAC Verification

Scaling physical RF emulation to city-scale cellular networks with hardware basebands.

Distributed FPGA Digital Twin Topologies

To emulate 50 coordinated base stations, ISACSimulator distributes channel computation across a cluster of PCIe FPGA accelerator cards linked by 400 Gbps optical switching fabrics, sustaining aggregate processing exceeding 100 Terabits per second.

Phase-Coherence and Calibration at Sub-THz Frequencies

Operating at D-band (130-175 GHz) requires femtosecond-precision clock distribution. Automated calibration routines measure and compensate thermal phase drifts in real time.

Industry Testbed Case Studies and Throughput Benchmarks

Tier-1 telecom operator validation verified 10 Gbps peak downlink throughput alongside sub-meter multi-target radar tracking across a simulated 12-block metropolitan grid.

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